Cluster Generation and Scheduling for Instruction (L0) Clusters

Clustered L0 buffers are an interesting alternative to reduce energy consumption in the instruction memory hierarchy of embedded VLIW processors. Currently, the synthesis of L0 clusters is performed as an hardware optimization, where the compiler generates a schedule and based on the given schedule L0 clusters are generated. Since, the result of the clustering depends on the given schedule, it offers an interesting design space to explore the effects of clustering by altering the schedule to increase energy efficiency. This paper presents a study indicating the potentials offered by scheduling for L0 clusters in terms of L0 buffer energy reduction. The list scheduler is extended to recognize the L0 clusters, and based on a few simple heuristics the operations are assigned to certain L0 clusters, followed by an iterative methodology to reduce L0 buffer energy consumption. The simulation results indicate that potentially up to 10% of the L0 buffer energy can be reduced by scheduling for L0 clusters with a simple heuristic.